A system-on-a-chip (SoC) integrates all components of a computer or another electronic system on a chip. The SoC includes software and hardware. The SoC is used with other SoCs to develop a system for performing a number of functions, e.g., printing, receiving data, sending data, receiving phone calls, playing virtual games, etc.
Hardware blocks of SoCs are designed using a software tool, e.g., a computer-aided design (CAD) tool. Also, software drivers that control the hardware blocks are integrated within the design. The SoCs are verified for operation before being sent to a foundry. The verification is performed using one or more languages, e.g., SystemVerilog, SystemC, and OpenVera. Any bugs found while verifying the SoC may be corrected.
However, the verification of operations of the SoC may be performed during a later stage of development of the SoC. Traditionally, engineers have employed simulation acceleration, emulation and/or a field programmable gate array (FPGA) prototype to verify and debug both hardware and software for SoC designs prior to tapeout. However, the acceleration, emulation, and prototyping consume a large amount of time to create. This large amount of time increases time-to-market and reduces financial revenues.
It is in this context that embodiments described in the present disclosure arise.